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EL8170, EL8173
Data Sheet February 14, 2008 FN7490.4
Micropower, Single Supply, Rail-to-Rail Input-Output Instrumentation Amplifiers
The EL8170 and EL8173 are micropower instrumentation amplifiers optimized for single supply operation over the +2.4V to +5.5V range. Inputs and outputs can operate rail-to-rail. As with all instrumentation amplifiers, a pair of inputs provide very high common-mode rejection and are completely independent from a pair of feedback terminals. The feedback terminals allow zero input to be translated to any output offset, including ground. A feedback divider controls the overall gain of the amplifier. The EL8170 is compensated for a gain of 100 or more, and the EL8173 is compensated for a gain of 10 or more. The EL8170 and EL8173 have bipolar input devices for best offset and 1/f noise performance. The amplifiers can be operated from one lithium cell or two Ni-Cd batteries. The EL8170 and EL8173 input range includes ground to slightly above positive rail. The output stage swings to ground and positive supply (no pull-up or pull-down resistors are needed).
Features
* 95A maximum supply current * Maximum offset voltage - 200V (EL8170) - 1000V (EL8173) * Maximum 3nA input bias current * 396kHz -3dB bandwidth (G = 10) * 192kHz -3dB bandwidth (G = 100) * Single supply operation - Input voltage range is rail-to-rail - Output swings rail-to-rail * Pb-free (RoHS compliant)
Applications
* Battery- or solar-powered systems * Strain gauges * Current monitors * Thermocouple amplifiers
Pinout
EL8170, EL8173 (8 LD SOIC) TOP VIEW
EN 1 IN- 2 IN+ 3 V- 4
+ + -
Ordering Information
PART NUMBER (Note) EL8170FSZ* EL8173FSZ* PART MARKING 8170FSZ 8173FSZ PACKAGE 8 Ld SOIC 8 Ld SOIC PKG. DWG. # MDP0027 MDP0027
8 FB+ 7 V+ 6 VOUT 5 FB-
*Add "-T7" suffix for tape and reel. Please refer to TB347 for details on reel specifications. NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate PLUS ANNEAL - e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright (c) Intersil Americas Inc. 2006, 2007, 2008. All Rights Reserved. All other trademarks mentioned are the property of their respective owners.
EL8170, EL8173
Absolute Maximum Ratings (TA = +25C)
Supply Voltage, V+ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5V Differential Input Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5mA Differential Input Voltage (EL8170) . . . . . . . . . . . . . . . . . . . . . . 0.5V Differential Input Voltage (EL8173) . . . . . . . . . . . . . . . . . . . . . . 1.0V VEN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.5V to V+ + 0.5V ESD Rating Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3kV
Thermal Information
Thermal Resistance (Typical, Note 1) JA (C/W) 8 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . 110 Output Short-Circuit Duration . . . . . . . . . . . . . . . . . . . . . . .Indefinite Ambient Operating Temperature . . . . . . . . . . . . . . .-40C to +125C Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65C to +150C Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty.
NOTES: 1. JA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA
Electrical Specifications
V+ = +5V, V- = GND, VCM = 1/2V+, VEN = V-, RL = Open, TA = +25C, unless otherwise specified. Boldface limits apply over the operating temperature range, -40C to +125C. Temperature data established by characterization. CONDITIONS MIN (Note 2) TYP MAX (Note 2) UNIT
PARAMETER DC SPECIFICATIONS VOS
DESCRIPTION
Input Offset Voltage
EL8170 EL8173
-200 -300 -1000 -1500
50 200 0.24 2.5
200 300 1000 1500
V V V/C V/C
TCVOS
Input Offset Voltage Temperature Coefficient Input Offset Current between IN+, and IN- and between FB+ and FBInput Bias Current (IN+, IN-, FB+, and FB- terminals) Input Voltage Range Common Mode Rejection Ratio
EL8170 EL8173 -2 -3 -3 -4 Guaranteed by CMRR test EL8170 EL8173 VCM = 0V to +5V 0 90 85 85 80 V+ = +2.4V to +5V 85 80 75 70 RL = 100k to +2.5V -1.5 2 -0.4 -0.8
IOS IB VIN CMRR
0.2 0.7
2 3 3 4 5
nA nA V dB dB dB dB
114 106 106 90 +0.35 +0.1 4 0.13 1.5 2 0.4 0.8 10 0.2 0.25
PSRR
Power Supply Rejection Ratio
EL8170 EL8173
EG
Gain Error
EL8170 EL8173
% % mV V V V
VOUT
Maximum Voltage Swing
Output low, RL = 100k to +2.5V Output low, RL = 1k to +2.5V Output high, RL = 100k to +2.5V Output high, RL = 1k to +2.5V 4.985 4.980 4.75 45 38
4.996 4.887 65 95 110
IS,EN
Supply Current, Enabled
A
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FN7490.4 February 14, 2008
EL8170, EL8173
Electrical Specifications
V+ = +5V, V- = GND, VCM = 1/2V+, VEN = V-, RL = Open, TA = +25C, unless otherwise specified. Boldface limits apply over the operating temperature range, -40C to +125C. Temperature data established by characterization. (Continued) CONDITIONS EN = V+ MIN (Note 2) 1.8 1.3 2 0.8 V+ to V- (Note 3) 2.4 23 19 6 4.5 19 15 5 4 32 8 26 7 5.5 TYP 2.6 MAX (Note 2) 4 5 UNIT A V V V mA mA mA mA
PARAMETER IS,DIS VENH VENL VSUPPLY IO+
DESCRIPTION Supply Current, Disabled EN Pin for Shut-down EN Pin for Power-on Supply Operating Range
Output Source Current into 10 to V+/2 V+ = +5V V+ = +2.4V
IO-
Output Sink Current into 10 to V+/2
V+ = +5V V+ = +2.4V
AC SPECIFICATIONS -3dB BW -3dB Bandwidth EL8170 Gain = 100 Gain = 200 Gain = 500 Gain = 1000 EL8173 Gain = 10 Gain = 20 Gain = 50 Gain = 100 eN Input Noise Voltage EL8170 EL8173 Input Noise Voltage Density EL8170 EL8173 iN Input Noise Current Density EL8170, fo = 1kHz EL8173, fo = 1kHz CMRR @ 60Hz Input Common Mode Rejection Ratio EL8170 EL8173 PSRR+ @ 120Hz PSRR- @ 120Hz Power Supply Rejection Ratio (V+) EL8170 EL8173 Power Supply Rejection Ratio (V-) EL8170 EL8173 VCM = 1VP-P, RL = 10k to VCM V+, V- = 2.5V, VSOURCE = 1VP-P, RL = 10k to VCM V+, V- = 2.5V, VSOURCE = 1VP-P, RL = 10k to VCM fo = 1kHz f = 0.1Hz to 10Hz 192 93 30 13 396 221 69 30 3.5 3.6 58 220 0.38 0.8 100 84 98 78 106 82 kHz kHz kHz kHz kHz kHz kHz kHz VP-P VP-P nV/Hz nV/Hz pA/Hz pA/Hz dB dB dB dB dB dB
TRANSIENT RESPONSE SR NOTES: 2. Parts are 100% tested at +25C. Temperature limits established by characterization and are not production tested. 3. VSUPPLY = +5.25V max when VENL = +V (device in disable state). Slew Rate RL = 1k to GND 0.4 0.35 0.55 0.7 0.7 V/s
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FN7490.4 February 14, 2008
EL8170, EL8173 Typical Performance Curves V+ = +5V, V- = 0V,VCM = +2.5V, VEN = V-, RL = Open, unless otherwise specified.
90 80 70 GAIN (dB) 60 50 40 30 GAIN = 2,000V/V GAIN = 1,000V/V GAIN = 500V/V GAIN = 200V/V GAIN = 100V/V GAIN (dB) COMMON-MODE INPUT = 1/2V+ GAIN = 10,000V/V GAIN = 5,000V/V 50 40 30 20 10 1E+00 70 60 GAIN = 1000 GAIN = 500 GAIN = 200 GAIN = 100 GAIN = 50 GAIN = 20 GAIN = 10 COMMON-MODE INPUT = 1/2V+
1
10
100
1k
10k
100k
1M
1E+01
FREQUENCY (Hz)
1E+02 1E+03 1E+04 FREQUENCY (Hz)
1E+05
1E+06
FIGURE 1. EL8170 FREQUENCY RESPONSE vs CLOSED LOOP GAIN
FIGURE 2. EL8173 FREQUENCY RESPONSE vs CLOSED LOOP GAIN
45 40 35 30 GAIN (dB) 25 20 15 10 5 AV = 100 RL = 10k CL = 10pF RF/RG = 99.02 RF = 221k RG = 2.23k 1k 10k 100k 1M V+ = 3.3V GAIN (dB) 15 V+ = 2.4V V+ = 5V 20 V+ = 3.3V V+ = 2.4V AV = 10 R = 10k CL = 10pF RF/RG = 9.08 RF = 178k RG = 19.6k 1k 10k FREQUENCY (Hz) 100k 1M V+ = 5V
10
5
0 100
0 100
FREQUENCY (Hz)
FIGURE 3. EL8170 FREQUENCY RESPONSE vs SUPPLY VOLTAGE
FIGURE 4. EL8173 FREQUENCY RESPONSE vs SUPPLY VOLTAGE
50
30 25 CL = 470pF CL = 820pF GAIN (dB) CL = 47pF 20 CL = 27pF 15 CL = 2.7pF 10 5 AV = 10 V+ = 5V RL = 10k RF/RG = 9.08 RF = 178k RG = 19.6k 1k 10k FREQUENCY (Hz) FREQUENCY (Hz) 100k 1M CL = 100pF
45
GAIN (dB)
40 CL = 220pF 35 AV = 100 V+, V- = 2.5V RL = 10k RF/RG = 99.02 RF = 221k RG = 2.23k 1k 10k CL = 56pF
30
25 100
100k
1M
0 100
FIGURE 5. EL8170 FREQUENCY RESPONSE vs CLOAD
FIGURE 6. EL8173 FREQUENCY RESPONSE vs CLOAD
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FN7490.4 February 14, 2008
EL8170, EL8173 Typical Performance Curves V+ = +5V, V- = 0V,VCM = +2.5V, VEN = V-, RL = Open, unless otherwise specified.
120 100 80 CMRR (dB) 60 40 20 0 10 100 1k 10k 100k 1M FREQUENCY (Hz) 90 80 70 CMRR (dB) CMRR 60 50 40 30 20 10 0 -10 10 100 1k 10k 100k 1M CMRR
(Continued)
FREQUENCY (Hz)
FIGURE 7. EL8170 CMRR vs FREQUENCY
FIGURE 8. EL8173 CMRR vs FREQUENCY
140 120 PSRR+ 100 PSRR (dB) 80 60 40 PSRRPSRR (dB)
90 80 PSRR+ 70 60 PSRR50 40 30 20
20 0 10
10 100 1k 10k 100k 1M 0 10 100 1k 10k 100k 1M
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 9. EL8170 PSRR vs FREQUENCY
FIGURE 10. EL8173 PSRR vs FREQUENCY
250 INPUT VOLTAGE NOISE (nV/Hz) INPUT VOLTAGE NOISE (V//Hz)
2.5
2.0
200
1.5
150
1.0
100
0.5
50
0.0 1 10 100 1k 10k 100k FREQUENCY (Hz)
1
10
100
1k
10k
100k
FREQUENCY (Hz)
FIGURE 11. EL8170 VOLTAGE NOISE DENSITY
FIGURE 12. EL8173 VOLTAGE NOISE DENSITY
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FN7490.4 February 14, 2008
EL8170, EL8173 Typical Performance Curves V+ = +5V, V- = 0V,VCM = +2.5V, VEN = V-, RL = Open, unless otherwise specified.
1.0 CURRENT NOISE (pA/Hz) 0.9 0.8 0.7 0.6 0.5 0.4 0.3 1 5.0 4.5 CURRENT NOISE (pA/Hz) 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 10 100 1k 10k 100k 0.0 1 10 100 1k 10k 100k FREQUENCY (Hz)
(Continued)
FREQUENCY (Hz)
FIGURE 13. EL8170 CURRENT NOISE DENSITY
FIGURE 14. EL8173 CURRENT NOISE DENSITY
VOLTAGE NOISE (0.5V/DIV)
VOLTAGE NOISE (0.5V/DIV)
TIME (1s/DIV)
TIME (1s/DIV)
FIGURE 15. EL8170 0.1Hz TO 10Hz INPUT VOLTAGE NOISE (GAIN = 100)
FIGURE 16. EL8173 0.1Hz TO 10Hz INPUT VOLTAGE NOISE (GAIN = 10)
85 N = 2000 80 SUPPLY CURRENT (A) SUPPLY CURRENT (A) 75 70 65 MEDIAN 60 55 50 45 40 -40 -20 0 20 40 60 80 TEMPERATURE (C) 100 120 MIN MAX
90 85 80 75 70 65 60 55 50 45 40 -40 -20 0 20 40 60 80 TEMPERATURE (C) 100 120 MIN MEDIAN N = 1000 MAX
FIGURE 17. EL8170 SUPPLY CURRENT ENABLED vs TEMPERATURE, V+, V- = 2.5V, VIN = 0V
FIGURE 18. EL8173 SUPPLY CURRENT ENABLED vs TEMPERATURE, V+, V- = 2.5V, VIN = 0V
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FN7490.4 February 14, 2008
EL8170, EL8173 Typical Performance Curves V+ = +5V, V- = 0V,VCM = +2.5V, VEN = V-, RL = Open, unless otherwise specified.
5.0 N = 2000 SUPPLY CURRENT (A) MAX 4.0 3.5 3.0 2.5 MIN 2.0 1.5 -40 MEDIAN SUPPLY CURRENT (A) 4.5 4.5 4.0 3.5 3.0 2.5 MIN 2.0 1.5 -20 0 20 40 60 80 TEMPERATURE (C) 100 120 -40 -20 0 20 40 60 80 100 120 TEMPERATURE (C) MEDIAN 5.0 N = 1000 MAX
(Continued)
FIGURE 19. EL8170 SUPPLY CURRENT DISABLED vs TEMPERATURE, V+, V- = 2.5V, VEN = V+, VIN = 0V
FIGURE 20. EL8173 SUPPLY CURRENT DISABLED vs TEMPERATURE, V+, V- = 2.5V, VEN = V+, VIN = 0V
300 N = 2000 200 100 VOS (V) VOS (V) MEDIAN 0 MAX
1000
N = 1000 MAX
500
0
MEDIAN
-100 MIN -200 -300 -40 -20 0 20 40 60 80 100 120 TEMPERATURE (C)
-500 MIN
-1000
-1500 -40 -20 0 20 40 60 80 TEMPERATURE (C) 100 120
FIGURE 21. EL8170 VOS vs TEMPERATURE, V+, V- = 2.5V, VIN = 0V
FIGURE 22. EL8173 VOS vs TEMPERATURE, V+, V- = 2.5V, VIN = 0V
400 N = 2000 300 MAX 200 VOS (V) 100 MEDIAN 0 -100 -200 -300 -40 -20 0 20 40 60 80 TEMPERATURE (C) 100 120 MIN VOS (V)
1000 N = 1000 500 MAX
0 MEDIAN -500
-1000 MIN -1500 -40 -20 0 20 40 60 80 100 120 TEMPERATURE (C)
FIGURE 23. EL8170 VOS vs TEMPERATURE, V+, V- = 1.2V, VIN = 0V
FIGURE 24. EL8173 VOS vs TEMPERATURE, V+, V- = 1.2V, VIN = 0V
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FN7490.4 February 14, 2008
EL8170, EL8173 Typical Performance Curves V+ = +5V, V- = 0V,VCM = +2.5V, VEN = V-, RL = Open, unless otherwise specified.
140 N = 2000 130 120 110 100 MIN 90 80 -40 90 80 -40 MIN -20 0 20 40 60 80 100 120 MAX 130 120 MEDIAN 110 100 140 N = 1000 MAX
(Continued)
CMRR (dB)
-20
0
20
40
60
80
100
120
TEMPERATURE (C)
CMRR (dB)
MEDIAN
TEMPERATURE (C)
FIGURE 25. EL8170 CMRR vs TEMPERATURE, VCM = +2.5V TO -2.5V, V+, V- = 2.5V
FIGURE 26. EL8173 CMRR vs TEMPERATURE, VCM = +2.5V TO -2.5V, V+, V- = 2.5V
140 130 120 PSRR (dB)
N = 2000
140 MAX 130 120 PSRR (dB) MEDIAN 110 100 90 80 MIN 70
N = 1000
MAX
110 100 90 80 70 60 -40 -20 0 20
MEDIAN
MIN
40
60
80
100
120
60 -40
-20
0
TEMPERATURE (C)
20 40 60 80 TEMPERATURE (C)
100
120
FIGURE 27. EL8170 PSRR vs TEMPERATURE, V+, V- = 1.2V TO 2.5V
FIGURE 28. EL8173 PSRR vs TEMPERATURE, V+, V- = 1.2V TO 2.5V
2.4 N = 2000 1.9 GAIN ERROR (%) MAX 1.4 GAIN ERROR (%)
0.7 N = 1000 0.6 0.5 0.4 MAX 0.3 0.2 0.1 0 MIN 0 20 40 60 80 100 120 -0.1 -40 -20 0 20 40 60 80 100 120 MEDIAN
0.9 MEDIAN MIN -0.1 -40 -20
0.4
TEMPERATURE (C)
TEMPERATURE (C)
FIGURE 29. EL8170 %GAIN ERROR vs TEMPERATURE, RL = 100k
FIGURE 30. EL8173 %GAIN ERROR vs TEMPERATURE, RL = 100k
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FN7490.4 February 14, 2008
EL8170, EL8173 Typical Performance Curves V+ = +5V, V- = 0V,VCM = +2.5V, VEN = V-, RL = Open, unless otherwise specified.
4.91 N = 2000 4.90 4.89 VOUT (V) 4.88 4.87 MIN 4.86 4.85 4.84 -40 -20 0 20 40 60 80 100 120 4.86 4.85 4.84 -40 -20 0 20 40 60 80 100 120 MAX VOUT (V) MEDIAN 4.91 N = 1000 4.90 4.89 4.88 4.87 MIN MAX MEDIAN
(Continued)
TEMPERATURE (C)
TEMPERATURE (C)
FIGURE 31. EL8170 VOUT HIGH vs TEMPERATURE, RL = 1k, V+, V- = 2.5V
FIGURE 32. EL8173 VOUT HIGH vs TEMPERATURE, RL = 1k, V+, V- = 2.5V
200 N = 2000 180 160 140 120 100 80 -40 MAX
200 N = 1000 180 160 140 120 100 80 -40 MAX MEDIAN
VOUT (mV)
MEDIAN MIN
VOUT (mV)
MIN
-20
0
20
40
60
80
100
120
-20
0
20
40
60
80
100
120
TEMPERATURE (C)
TEMPERATURE (C)
FIGURE 33. EL8170 VOUT LOW vs TEMPERATURE, RL = 1k, V+, V- = 2.5V
FIGURE 34. EL8173 VOUT LOW vs TEMPERATURE, RL = 1k, V+, V- = 2.5V
0.65 0.60 + SLEW RATE (V/S) 0.55
N = 2000 MAX
0.70 N = 1000 0.65 + SLEW RATE (V/S) 0.60 MEDIAN 0.55 0.50 0.45 0.40 -40 MAX
MEDIAN 0.50 MIN 0.45 0.40 0.35 0.30 -40 -20 0 20 40 60 80 100 120
MIN
-20
0
20
40
60
80
100
120
TEMPERATURE (C)
TEMPERATURE (C)
FIGURE 35. EL8170 + SLEW RATE vs TEMPERATURE, INPUT 0.015V @ GAIN + 100
FIGURE 36. EL8173 + SLEW RATE vs TEMPERATURE, INPUT 0.015V @ GAIN + 100
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FN7490.4 February 14, 2008
EL8170, EL8173 Typical Performance Curves V+ = +5V, V- = 0V,VCM = +2.5V, VEN = V-, RL = Open, unless otherwise specified.
0.70 0.65 - SLEW RATE (V/S) 0.60 MEDIAN 0.55 0.50 0.45 0.40 0.35 0.30 -40 -20 0 20 40 60 80 100 120 MIN N = 2000 0.70 MAX 0.65 - SLEW RATE (V/S) 0.60 0.55 MIN 0.50 0.45 0.40 -40 MEDIAN N = 1000 MAX
(Continued)
-20
0
20
40
60
80
100
120
TEMPERATURE (C)
TEMPERATURE (C)
FIGURE 37. EL8170 - SLEW RATE vs TEMPERATURE, INPUT 0.015V @ GAIN + 100
FIGURE 38. EL8173 - SLEW RATE vs TEMPERATURE, INPUT 0.015V @ GAIN + 100
Pin Descriptions
EL8170, EL8173 1 PIN NAME EN EQUIVALENT CIRCUIT Circuit 2 PIN FUNCTION Active LOW logic pins. When pulled above 2V, the corresponding channel turns off and OUT is high impedance. A channel is enabled when pulled below 0.8V. Built-in pull downs define each EN pin LOW when left floating. High impedance input terminals. EL8170 input circuit is shown in Circuit 1A, and the EL8173 input circuit is shown in Circuit 1B. EL8173: to avoid offset drift, it is recommended that the terminals are not overdriven beyond 1V and the input current must never exceed 5mA. Negative supply terminal. High impedance feedback terminals. EL8170 input circuit is shown in Circuit 1A, and the EL8173 input circuit is shown in Circuit 1B. EL8173: to avoid offset drift, it is recommended that the terminals are not overdriven beyond 1V and the input current must never exceed 5mA. Positive supply terminal. Output Voltage.
V+ V+ LOGIC PIN VCIRCUIT 2 V+ INFBIN+ FB+ VCIRCUIT 3 OUT VVCIRCUIT 4
2 3
ININ+
Circuit 1A, Circuit 1B Circuit 1A, Circuit 1B
4 5 8
VFBFB+
Circuit 4 Circuit 1A, Circuit 1B Circuit 1A, Circuit 1B
7 6
V+ VOUT
Circuit 4 Circuit 3
V+ INFBIN+ FB+ V-
V+
CAPACITIVELY COUPLED ESD CLAMP
CIRCUIT 1A
CIRCUIT 1B
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FN7490.4 February 14, 2008
EL8170, EL8173 Description of Operation and Applications Information
Product Description
The EL8170 and EL8173 are micropower instrumentation amplifiers (in-amps) which deliver rail-to-rail input amplification and rail-to-rail output swing on a single +2.4V to +5.5V supply. The EL8170 and EL8173 also deliver excellent DC and AC specifications while consuming only 65A typical supply current. Because the EL8170 and EL8173 provide an independent pair of feedback terminals to set the gain and to adjust output level, these in-amps achieve high common-mode rejection ratio regardless of the tolerance of the gain setting resistors. The EL8173 is internally compensated for a minimum closed loop gain of 10 or greater, well suited for moderate to high gains. For higher gains, the EL8170 is internally compensated for a minimum gain of 100. An EN pin is used to reduce power consumption, typically 2.6A, while the instrumentation amplifier is disabled.
Input Bias Cancellation, Input Bias Compensation
Both EL8170 and EL8173 feature an Input Bias Cancellation/Compensation Circuit for both the input and feedback terminals (IN+, IN-, FB+ and FB-), achieving a low input bias current all throughout the input common-mode range and the operating temperature range. While the PNP bipolar input stages are biased with an adequate amount of biasing current for speed and increased noise performance, the Input Bias Cancellation/Compensation Circuit sinks most of the base current of the input transistor leaving a small portion as input bias current, typically 500pA. In addition, the Input Bias Cancellation/Compensation Circuit maintains a smooth and flat behavior of input bias current over the common mode range and over the operating temperature range. The Input Bias Cancellation, Input Bias Compensation Circuit operates from input voltages of 10mV above the negative supply to input voltages slightly above the positive supply. See "Average Input Bias Current vs Common-Mode Input Voltage" in the "Typical Performance Curves" beginning on page 4.
Input Protection
All input and feedback terminals of the EL8170 and EL8173 have internal ESD protection diodes to both positive and negative supply rails, limiting the input voltage to within one diode drop beyond the supply rails. The inverting inputs and FB- inputs have ESD diodes to the V-rail, and the non-inverting inputs and FB+ terminals have ESD diodes to the V+ rail. The EL8170 has additional back-to-back diodes across the input terminals and also across the feedback terminals. If overdriving the inputs is necessary, the external input current must never exceed 5mA. On the other hand, the EL8173 has no clamps to limit the differential voltage on the input terminals allowing higher differential input voltages at lower gain applications. It is recommended however, that the input terminals of the EL8173 are not overdriven beyond 1V to avoid offset drift. An external series resistor may be used as an external protection to limit excessive external voltage and current from damaging the inputs.
Output Stage and Output Voltage Range
A pair of complementary MOSFET devices drives the output VOUT to within a few millivolts of the supply rails. At a 100k load, the PMOS sources current and pulls the output up to 4mV below the positive supply, while the NMOS sinks current and pulls the output down to 4mV above the negative supply, or ground in the case of a single supply operation. The current sinking and sourcing capability of the EL8170 and EL8173 are internally limited to 26mA.
Gain Setting
VIN, the potential difference across IN+ and IN-, is replicated (less the input offset voltage) across FB+ and FB-. The objective of the EL8170 and EL8173 in-amp is to maintain the differential voltage across FB+ and FB- equal to IN+ and IN-; (FB+ - FB-) = (IN+ - IN-). Consequently, the transfer function can be derived. The gain of the EL8170 and EL8173 is set by two external resistors, the feedback resistor RF, and the gain resistor RG.
Input Stage and Input Voltage Range
The input terminals (IN+ and IN-) of the EL8170 and EL8173 are single differential pair bipolar PNP devices aided by an Input Range Enhancement Circuit to increase the headroom of operation of the common-mode input voltage. The feedback terminals (FB+ and FB-) also have a similar topology. As a result, the input common-mode voltage range of both the EL8170 and EL8173 is rail-to-rail. These in-amps are able to handle input voltages that are at or slightly beyond the supply and ground making these in-amps well suited for single +5V or +3.3V low voltage supply systems. There is no need to move the common-mode input of the in-amps to achieve symmetrical input voltage.
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FN7490.4 February 14, 2008
EL8170, EL8173
+2.4V TO +5.5V
7 VIN/2 3 IN+ 2 INVIN/2 8 FB+ 5 FBVCM V+ + EL8170/3 + 4 V+2.4V TO +5.5V VCM R1 REF R2 RG RF RG RF 1 EN 6 VIN/2 VOUT +2.4V TO +5.5V EN 7 VIN/2 3 IN+ 2 IN8 FB+ 5 FB+ - EL8170, EL8173 + 4 VV+ 1 EN 6 EN
VOUT
FIGURE 39. GAIN IS SET BY TWO EXTERNAL RESISTORS, RF AND RG RF V OUT = 1 + ------- V IN R G (EQ. 1)
FIGURE 40. GAIN SETTING AND REFERENCE CONNECTION
In Figure 39, the FB+ pin and one end of resistor RG are connected to GND. With this configuration, Equation 1 is only true for a positive swing in VIN; negative input swings will be ignored and the output will be at ground.
The FB+ pin can also be connected to the other end of resistor, RG. See Figure 41. Keeping the basic concept that the EL8170 and EL8173 in-amps maintain constant differential voltage across the input terminals and feedback terminals (IN+ - IN- = FB+ - FB-), the transfer function of Figure 41 can be derived (Equation 3). Note that the VREF gain term is eliminated, and susceptibility to external noise is reduced.
+2.4V TO +5.5V 7 VIN/2 3 IN+ 2 INVIN/2 8 FB+ 5 FBVCM V+ + - EL8170, EL8173 + 4 V1 EN 6
Reference Connection
Unlike a three op amp instrumentation amplifier, a finite series resistance seen at the REF terminal does not degrade the EL8170 and EL8173's high CMRR performance, eliminating the need for an additional external buffer amplifier. The circuit shown in Figure 40 uses the FB+ pin as a REF terminal to center or to adjust the output. Because the FB+ pin is a high impedance input, an economical resistor divider can be used to set the voltage at the REF terminal. The reference voltage error due to the input bias current is minimized by keeping the values of the voltage divider resistors, R1 and R2, as low as possible. Any voltage applied to the REF terminal will shift VOUT by VREF times the closed loop gain, which is set by resistors RF and RG according to Equation 2. Note that any noise or unwanted signals on the reference supply will be amplified at the output according to Equation 2.
RF RF V OUT = 1 + ------- ( V IN ) + 1 + ------- ( V REF ) R G R G (EQ. 2)
EN
VOUT
VREF
RG
RF
FIGURE 41. REFERENCE CONNECTION WITH AN AVAILABLE VREF RF V OUT = 1 + ------- ( V IN ) + ( V REF ) R G (EQ. 3)
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FN7490.4 February 14, 2008
EL8170, EL8173
External Resistor Mismatches
Because of the independent pair of feedback terminals provided by the EL8170 and EL8173, the CMRR is not degraded by any resistor mismatches. Hence, unlike a three op amp and especially a two op amp in-amp, the EL8170 and EL8173 reduce the cost of external components by allowing the use of 1% or more tolerance resistors without sacrificing CMRR performance. The EL8170 and EL8173 CMRR is maintained regardless of the tolerance of the resistors used.
Power Dissipation
It is possible to exceed the +150C maximum junction temperatures under certain load and power-supply conditions. It is therefore important to calculate the maximum junction temperature (TJMAX) for all applications to determine if power supply voltages, load conditions, or package type need to be modified to remain in the safe operating area. These parameters are related in Equation 6:
T JMAX = T MAX + ( JA xPD MAXTOTAL ) (EQ. 6)
Gain Error and Accuracy
The EL8173 has a Gain Error, EG, of 0.2% typical. The EL8170 has an EG of 0.3% typical. The gain error indicated in the "Electrical Specifications" table on page 2 is the inherent gain error of the EL8170 and EL8173 and does not include the gain error contributed by the resistors. There is an additional gain error due to the tolerance of the resistors used. The resulting non-ideal transfer function effectively becomes Equation 4:
RF V OUT = 1 + ------- x [ 1 - ( E RG + E RF + E G ) ] x V IN R G (EQ. 4)
where: * PDMAXTOTAL is the sum of the maximum power dissipation of each amplifier in the package (PDMAX) * PDMAX for each amplifier can be calculated as shown in Equation 7:
V OUTMAX PD MAX = 2*V S x I SMAX + ( V S - V OUTMAX ) x --------------------------RL (EQ. 7)
where: * TMAX = Maximum ambient temperature * JA = Thermal resistance of the package * PDMAX = Maximum power dissipation of 1 amplifier * VS = Supply voltage (Magnitude of V+ and V-) * IMAX = Maximum supply current of 1 amplifier * VOUTMAX = Maximum output voltage swing of the application * RL = Load resistance
Where: ERG= Tolerance of RG ERF= Tolerance of RF EG= Gain Error of the EL8170 or EL8173 The term [1 - (ERG + ERF + EG)] is the deviation from the theoretical gain. Thus, (ERG + ERF + EG) is the total gain error. For example, if 1% resistors are used for the EL8170, the total gain error would be:
= ( E RG + E RF + E G ( typical ) ) = ( 0.01 + 0.01 + 0.003 ) = 2.3% (EQ. 5)
Disable/Power-Down
The EL8170 and EL8173 can be powered down reducing the supply current to typically 2.9A. When disabled, the output is in a high impedance state. The active low EN bar pin has an internal pull-down and hence can be left floating and the in-amp enabled by default. When the EN bar is connected to an external logic, the in-amp will power down when the EN bar is pulled above 2V, and will power-on when the EN bar is pulled below 0.8V.
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation's quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com 13
FN7490.4 February 14, 2008
EL8170, EL8173 Small Outline Package Family (SO)
A D N (N/2)+1 h X 45
A E E1 PIN #1 I.D. MARK c SEE DETAIL "X"
1 B
(N/2) L1
0.010 M C A B e C H A2 GAUGE PLANE A1 0.004 C 0.010 M C A B b DETAIL X
SEATING PLANE L 4 4
0.010
MDP0027
SMALL OUTLINE PACKAGE FAMILY (SO) INCHES SYMBOL A A1 A2 b c D E E1 e L L1 h N NOTES: 1. Plastic or metal protrusions of 0.006" maximum per side are not included. 2. Plastic interlead protrusions of 0.010" maximum per side are not included. 3. Dimensions "D" and "E1" are measured at Datum Plane "H". 4. Dimensioning and tolerancing per ASME Y14.5M-1994 SO-8 0.068 0.006 0.057 0.017 0.009 0.193 0.236 0.154 0.050 0.025 0.041 0.013 8 SO-14 0.068 0.006 0.057 0.017 0.009 0.341 0.236 0.154 0.050 0.025 0.041 0.013 14 SO16 (0.150") 0.068 0.006 0.057 0.017 0.009 0.390 0.236 0.154 0.050 0.025 0.041 0.013 16 SO16 (0.300") (SOL-16) 0.104 0.007 0.092 0.017 0.011 0.406 0.406 0.295 0.050 0.030 0.056 0.020 16 SO20 (SOL-20) 0.104 0.007 0.092 0.017 0.011 0.504 0.406 0.295 0.050 0.030 0.056 0.020 20 SO24 (SOL-24) 0.104 0.007 0.092 0.017 0.011 0.606 0.406 0.295 0.050 0.030 0.056 0.020 24 SO28 (SOL-28) 0.104 0.007 0.092 0.017 0.011 0.704 0.406 0.295 0.050 0.030 0.056 0.020 28 TOLERANCE MAX 0.003 0.002 0.003 0.001 0.004 0.008 0.004 Basic 0.009 Basic Reference Reference NOTES 1, 3 2, 3 Rev. M 2/07
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FN7490.4 February 14, 2008

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